The present invention relates to a multilayered semiconductor device having multiple core chips layered therein. More particularly, the invention is adapted advantageously to a multilayered semiconductor device that incorporates circuits for stably supplying power to internal circuits.
For a semiconductor integrated circuit to operate stably, it is very important to generate stable internal power within its core chips.
Generally, there are two methods by which an internal power supply circuit generates stable power. One method involves increasing the operating current of the power supply circuit so that the latter will improve its response speed. It should be noted that this technique entails an increase in power consumption.
Another method involves arranging compensation capacitance in the semiconductor device to increase the electrical charges to be accumulated in order to inhibit fluctuations in the operating voltage relative to those in the operating current. This technique, it should be noted, entails an increase in the chip area.
To design the internal power supply circuit in a manner minimizing increases in current consumption and in the chip area is a long-standing object to be sought after in designing semiconductor device products.
Meanwhile, there exist techniques for having multiple core chips layered in a single semiconductor device as a method for increasing the scale of an integrated circuit while minimizing the footprint of the semiconductor device.
In relation to the above-mentioned techniques, Japanese Unexamined Patent Application Publication No. 2012-209497 discloses a technique related to a multilayered semiconductor device that uses penetration electrodes. According to the technique disclosed in the above-cited patent literature, the penetration electrodes of interface chips and those of core chips are aligned positionally to eliminate high-resistance wiring in the planar direction. This technique inhibits drops in external supply voltages so that the core chips are fed with stable external supply voltages.